在BLIS框架内支持混合数据类型矩阵乘法
Supporting mixed-datatype matrix multiplication within the BLIS framework
摘要：
我们的方法的BLIS框架的一般矩阵乘法（GEMM）操作，从而每个矩阵操作数A，B和C可以被存储为单精度或双精度的实数或复数值内实现混合数据类型的支持的问题。另一个复杂性因素，即允许以不同于A或B的存储精度的精度进行计算，也包括在讨论中。我们首先将问题分解为正交维度，分别考虑域的混合和混合精度。支持所有组合的矩阵操作数存储在实域或复杂的域映射出枚举的情况下，并描述了每一个的实现方法。支持存储和计算精度的所有组合是通过在计算的关键阶段（根据需要在打包和/或累加期间）对矩阵进行类型转换来处理的。还记录了几个可选的优化。在56核Marvell ThunderX 2和52核Intel Xeon Platinum上收集的性能结果表明，高性能基本上得到了保留，不可避免的类型转换指令导致了适度的速度下降。混合数据类型的实现证实了组合的棘手性是避免的，框架只依赖于两个汇编微内核来实现128个数据类型组合。
英文摘要：
We approach the problem of implementing mixed-datatype support within the general matrix multiplication (GEMM) operation of the BLIS framework, whereby each matrix operand A, B, and C may be stored as single- or double-precision real or complex values. Another factor of complexity, whereby the computation is allowed to take place in a precision different from the storage precisions of either A or B, is also included in the discussion. We first break the problem into mostly orthogonal dimensions, considering the mixing of domains separately from mixing precisions. Support for all combinations of matrix operands stored in either the real or complex domain is mapped out by enumerating the cases and describing an implementation approach for each. Supporting all combinations of storage and computation precisions is handled by typecasting the matrices at key stages of the computation---during packing and/or accumulation, as needed. Several optional optimizations are also documented. Performance results gathered on a 56-core Marvell ThunderX2 and a 52-core Intel Xeon Platinum demonstrate that high performance is mostly preserved, with modest slowdowns incurred from unavoidable typecast instructions. The mixed-datatype implementation confirms that combinatoric intractability is avoided, with the framework relying on only two assembly microkernels to implement 128 datatype combinations.
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