VLSI用于DSP应用的级联积分梳状滤波器的实现
VLSI Implementation of Cascaded Integrator comb filters for DSP applications
摘要：
递归梳状滤波器或级联积分梳状滤波器（CIC）通常用作Σ-Δ调制器的抽取器。本文介绍了基于低通滤波器的高速CIC滤波器的VLSI实现、分析和设计。这些滤波器用于信号抽取，其具有降低采样率的效果。选择它也是因为它具有低功耗和低复杂度的吸引力，因为它不需要乘法器。Matlab软件中提供的Simulink工具箱，用于仿真器和Verilog HDL编码，帮助验证CIC滤波器的功能。文中给出了CIC滤波器的设计步骤和实例，重点讨论了频率响应、传递函数和寄存器宽度。实现结果表明，采用改进的超前进位加法器求和，并采用流水线滤波器结构，提高了运算速度，更适合DSP应用。
英文摘要：
The recursive comb filters or Cascaded Integrator Comb filter (CIC) are commonly used as decimators for the sigma-delta modulators. This paper presents the VLSI implementation, analysis and design of high-speed CIC filters which are based on a low-pass filter. These filters are used in the signal decimation which has the effect on reducing the sampling rate. It is also chosen because its attractive property of both low power and low complexity since it does not require a multiplier. Simulink toolbox available in Matlab software which is used to simulator and Verilog HDL coding help to verify the functionality of the CIC filters. Design procedures and examples are given for CIC filter with emphasis on frequency response, transfer function and register width. The implementation results show using Modified Carry Look-ahead Adder for summation and also apply pipelined filter structure enhanced high speed and make it more compatible with DSP applications.
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