BISMO：一种可扩展的位串行矩阵乘法覆盖层
BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing
摘要：
矩阵-矩阵乘法是科学和工程中众多应用的关键计算内核，具有足够的并行性和数据局部性，适合高性能实现。许多依赖矩阵乘法的应用程序可以使用降低精度的整数或定点表示来提高性能和能效，同时仍然提供足够的结果质量。然而，精度要求可能在不同的应用阶段之间变化，或者取决于输入数据，从而使得恒定精度解决方案无效。我们提出了BISMO，一个矢量化的位串行矩阵乘法覆盖可重构计算。BISMO利用FPGA出色的二进制运算性能提供矩阵乘法性能，可按所需精度和并行性进行缩放。我们通过一系列参数来描述BISMO的资源使用和性能，以构建硬件成本模型，并在Xilinx PYNQ-Z1板上展示了6.5 TOPS的峰值性能。
英文摘要：
Matrix-matrix multiplication is a key computational kernel for numerous applications in science and engineering, with ample parallelism and data locality that lends itself well to high-performance implementations. Many matrix multiplication-dependent applications can use reduced-precision integer or fixed-point representations to increase their performance and energy efficiency while still offering adequate quality of results. However, precision requirements may vary between different application phases or depend on input data, rendering constant-precision solutions ineffective. We present BISMO, a vectorized bit-serial matrix multiplication overlay for reconfigurable computing. BISMO utilizes the excellent binary-operation performance of FPGAs to offer a matrix multiplication performance that scales with required precision and parallelism. We characterize the resource usage and performance of BISMO across a range of parameters to build a hardware cost model, and demonstrate a peak performance of 6.5 TOPS on the Xilinx PYNQ-Z1 board.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
