通过牺牲冲压的纳米结构亚微米嵌段共聚物点：用于局部分辨传感、化学和细胞相互作用的潜在预富集平台
Nanostructured submicron block copolymer dots by sacrificial stamping: a potential preconcentration platform for locally resolved sensing, chemistry and cellular interactions
摘要：
传统的接触式光刻涉及通过压印或通过油墨转移来使表面图案化。我们报告直接平版转移到对应表面的牺牲邮票的一部分。使用由嵌段共聚物聚苯乙烯-嵌段-聚（2-吡啶）（PS-b-P2 VP）组成的牺牲印模，我们将高度约为100 nm的纳米结构亚微米PS-b-P2 VP点阵列沉积到硅晶片和载玻片上。牺牲PS-b-P2 VP印模用截锥形接触元件进行形貌图案化，并被海绵状连续纳米孔系统穿透。牺牲PS-b-P2 VP印模的海绵性质支持与配对表面的粘合剂接触的形成以及印模回缩期间接触元件的破裂。通过牺牲冲压产生的亚微米PS-b-P2 VP点可以进一步功能化，实例包括用染料加载亚微米PS-b-P2 VP点和将金纳米颗粒附着到它们的外表面。亚微米PS-b-P2 VP点的阵列可以集成到先进的光学显微镜、全内反射荧光显微镜或拉曼显微镜的装置中。纳米结构的亚微米嵌段共聚物点的阵列可以代表用于局部分辨传感和局部分辨细胞相互作用监测的预浓缩平台，或者可以用作芯片实验室配置中的微反应器阵列。
英文摘要：
Classical contact lithography involves patterning of surfaces by embossing or by transfer of ink. We report direct lithographic transfer of parts of sacrificial stamps onto counterpart surfaces. Using sacrificial stamps consisting of the block copolymer polystyrene-block-poly(2-pyridine) (PS-b-P2VP), we deposited arrays of nanostructured submicron PS-b-P2VP dots with heights of about 100 nm onto silicon wafers and glass slides. The sacrificial PS-b-P2VP stamps were topographically patterned with truncated-pyramidal contact elements and penetrated by spongy-continuous nanopore systems. The spongy nature of the sacrificial PS-b-P2VP stamps supported formation of adhesive contact to the counterpart surfaces and the rupture of the contact elements during stamp retraction. The submicron PS-b-P2VP dots generated by sacrificial stamping can be further functionalized, examples include loading submicron PS-b-P2VP dots with dyes and attachment of gold nanoparticles to their outer surfaces. The arrays of submicron PS-b-P2VP dots can be integrated into setups for advanced optical microscopy, total internal reflection fluorescence microscopy or Raman microscopy. Arrays of nanostructured submicron block copolymer dots may represent a preconcentration platform for locally resolved sensing and locally resolved monitoring of cellular interactions or might be used as microreactor arrays in lab-on-chip configurations.
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