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arXiv 1709.10077cs.PLcs.SE
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松弛内存模型的线程模块化静态分析

Thread-Modular Static Analysis for Relaxed Memory Models

Markus Kusano, Chao Wang

摘要:

提出了一种内存模型感知的静态程序分析方法,用于精确分析运行在具有弱一致性模型(如x86-TSO、SPARC-PSO和SPARC-RMO)的处理器上的并发软件的行为。在我们的方法的中心是一个统一的框架,用于决定线程间干扰的可行性,以避免传播虚假的数据流在静态分析,从而提高静态分析器的性能。我们制定的检查干扰的可行性作为一组数据库规则,这是有效的解决和一般足以捕捉一系列的硬件级内存模型。与现有技术相比,我们的方法可以显着减少虚假警报的数量,以及不健全的证据。我们实现了该方法,并评估了一个大的多线程的C程序集。我们的实验表明,该方法显着优于国家的最先进的技术在准确性方面只有适度的运行时开销。

英文摘要:

We propose a memory-model-aware static program analysis method for accurately analyzing the behavior of concurrent software running on processors with weak consistency models such as x86-TSO, SPARC-PSO, and SPARC-RMO. At the center of our method is a unified framework for deciding the feasibility of inter-thread interferences to avoid propagating spurious data flows during static analysis and thus boost the performance of the static analyzer. We formulate the checking of interference feasibility as a set of Datalog rules which are both efficiently solvable and general enough to capture a range of hardware-level memory models. Compared to existing techniques, our method can significantly reduce the number of bogus alarms as well as unsound proofs. We implemented the method and evaluated it on a large set of multithreaded C programs. Our experiments showthe method significantly outperforms state-of-the-art techniques in terms of accuracy with only moderate run-time overhead.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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