并行架构上的卡尔曼滤波器跟踪
Kalman filter tracking on parallel architectures
摘要：
对功耗的限制促使CPU在并行处理能力而不是时钟速率上增长，从而导致“众核”或类似GPU的处理器的兴起。为了实现最佳性能，应用程序必须能够充分利用跨多个核心的向量单元，或加速卡上的一些类似安排。这种并行性能正在成为一个关键的要求，方法来重建带电粒子的轨道在大型强子对撞机，并在未来的高亮度LHC。这是因为亮度的稳定增加导致整个事件重建时间呈指数增长，并且跟踪是迄今为止在线和离线处理中要求最高的任务。许多过去和现在的对撞机实验采用基于卡尔曼滤波器的算法进行跟踪，因为它们的鲁棒性和优异的物理性能，特别是对于材料相互作用起着重要作用的固态探测器。我们报告我们的研究进展，对卡尔曼滤波器的轨道重建算法的最佳性能的众核架构。这些算法的组合结构并不能立即与有效的SIMD（或SIMT）实现兼容;我们面临的挑战是改造现有的软件，以便它可以很容易地生成数百个共享内存线程，利用现代处理器的底层指令集。我们展示了如何组织的数据和相关的任务的方式，有利于多线程和矢量化。我们在英特尔至强和至强融核架构上展示了非常好的性能，并在Nvidia GPU上取得了令人鼓舞的初步成果。
英文摘要：
Limits on power dissipation have pushed CPUs to grow in parallel processing capabilities rather than clock rate, leading to the rise of "manycore" or GPU-like processors. In order to achieve the best performance, applications must be able to take full advantage of vector units across multiple cores, or some analogous arrangement on an accelerator card. Such parallel performance is becoming a critical requirement for methods to reconstruct the tracks of charged particles at the Large Hadron Collider and, in the future, at the High Luminosity LHC. This is because the steady increase in luminosity is causing an exponential growth in the overall event reconstruction time, and tracking is by far the most demanding task for both online and offline processing. Many past and present collider experiments adopted Kalman filter-based algorithms for tracking because of their robustness and their excellent physics performance, especially for solid state detectors where material interactions play a significant role. We report on the progress of our studies towards a Kalman filter track reconstruction algorithm with optimal performance on manycore architectures. The combinatorial structure of these algorithms is not immediately compatible with an efficient SIMD (or SIMT) implementation; the challenge for us is to recast the existing software so it can readily generate hundreds of shared-memory threads that exploit the underlying instruction set of modern processors. We show how the data and associated tasks can be organized in a way that is conducive to both multithreading and vectorization. We demonstrate very good performance on Intel Xeon and Xeon Phi architectures, as well as promising first results on Nvidia GPUs.
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