基于可编程的固定速率非二进制WOM码的构造
Construction of Fixed Rate Non-Binary WOM Codes based on Integer Programming
摘要：
在本文中，我们提出了一个非二进制WOM（一次写入存储器）的存储，如闪存代码的建设。本文中讨论的WOM码是固定速率WOM码，其中大小为$M$的固定字母表中的消息可以至少$t^*$次顺序地写入WOM存储器中。在本文中，一个WOM存储建模的状态转移图。拟议的建设有以下两个特点。首先，它包括一个系统的方法来确定状态转移图中的编码区域。第二，建议的建设包括一个标签的方法，通过使用整数规划的状态。利用所提出的结构构造了几种新的适用于2单元$q$级闪存的WOM码。在许多情况下，它们实现了满足已知上限的最差写入次数$t^*$。此外，我们还构造了固定速率的非二进制WOM码，具有降低闪存单元ICI（单元间干扰）的能力。所提出的结构的优点之一是其灵活性。它可以应用于各种存储设备，各种尺寸（即单元数）和各种附加约束。
英文摘要：
In this paper, we propose a construction of non-binary WOM (Write-Once-Memory) codes for WOM storages such as flash memories. The WOM codes discussed in this paper are fixed rate WOM codes where messages in a fixed alphabet of size $M$ can be sequentially written in the WOM storage at least $t^*$-times. In this paper, a WOM storage is modeled by a state transition graph. The proposed construction has the following two features. First, it includes a systematic method to determine the encoding regions in the state transition graph. Second, the proposed construction includes a labeling method for states by using integer programming. Several novel WOM codes for $q$ level flash memories with 2 cells are constructed by the proposed construction. They achieve the worst numbers of writes $t^*$ that meet the known upper bound in many cases. In addition, we constructed fixed rate non-binary WOM codes with the capability to reduce ICI (inter cell interference) of flash cells. One of the advantages of the proposed construction is its flexibility. It can be applied to various storage devices, to various dimensions (i.e, number of cells), and various kind of additional constraints.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
