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arXiv 1506.01072cs.NEcs.AIcs.CVcs.ET
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用于真实世界模式识别的同质脉冲神经形态系统

Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition

Boise State University(博伊西州立大学)

Xinyu Wu, Vishal Saxena, Kehan Zhu

摘要:

结合CMOS模拟尖峰神经元和忆阻突触的神经形态芯片为脑启发计算提供了一个有前途的解决方案,因为它可以提供大规模的神经网络并行性和密度。以前的混合模拟CMOS-忆阻器方法需要大量的CMOS电路进行训练,因此消除了采用忆阻器突触所获得的大部分密度优势。此外,他们对突触前和突触后尖峰使用了不同的波形,这增加了不期望的电路开销。在这里,我们描述了一个硬件架构,可以具有大量的忆阻器突触学习现实世界的模式。我们提出了一个多功能的CMOS神经元,它结合了集成和发射行为,驱动无源忆阻器并在紧凑的电路模块中实现竞争性学习,并使忆阻器突触中的原位可塑性成为可能。我们演示了手写数字识别使用晶体管级电路模拟所提出的架构。由于所描述的神经形态架构是同质的,它实现了大规模节能大脑启发硅芯片的基本构建块,可能导致下一代认知计算。

英文摘要:

A neuromorphic chip that combines CMOS analog spiking neurons and memristive synapses offers a promising solution to brain-inspired computing, as it can provide massive neural network parallelism and density. Previous hybrid analog CMOS-memristor approaches required extensive CMOS circuitry for training, and thus eliminated most of the density advantages gained by the adoption of memristor synapses. Further, they used different waveforms for pre and post-synaptic spikes that added undesirable circuit overhead. Here we describe a hardware architecture that can feature a large number of memristor synapses to learn real-world patterns. We present a versatile CMOS neuron that combines integrate-and-fire behavior, drives passive memristors and implements competitive learning in a compact circuit module, and enables in-situ plasticity in the memristor synapses. We demonstrate handwritten-digits recognition using the proposed architecture using transistor-level circuit simulations. As the described neuromorphic architecture is homogeneous, it realizes a fundamental building block for large-scale energy-efficient brain-inspired silicon chips that could lead to next-generation cognitive computing.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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