一种多GHz模拟瞬态记录器集成电路
A Multi-Gigahertz Analog Transient Recorder Integrated Circuit
摘要：
单片多通道模拟瞬态记录器，采用开关电容采样保持电路和高速模拟可调延迟线为基础的写时钟，已设计，制造和测试。2.1 x 6.9 mm的布局采用1.2微米CMOS，包括超过31，000个晶体管和2048个双多晶硅电容器。该电路包含四个并行通道，每个通道都有一个512深开关电容采样保持系统。一个512深沿敏感抽头有源延迟线使用前瞻和16路交织来开发512个采样和保持时钟，每个时钟的宽度只有3.2 ns，间隔为200 ps。该器件的测量结果表明，最大采样率为5 GHz，带宽至少为350 MHz，外推均方根孔径不确定度为0.7 ps，信号均方根噪声比为2000：1。
英文摘要：
A monolithic multi-channel analog transient recorder, implemented using switched capacitor sample-and-hold circuits and a high-speed analogically-adjustable delay-line-based write clock, has been designed, fabricated and tested. The 2.1 by 6.9 mm layout, in 1.2 micron CMOS, includes over 31,000 transistors and 2048 double polysilicon capacitors. The circuit contains four parallel channels, each with a 512 deep switched-capacitor sample-and-hold system. A 512 deep edge sensitive tapped active delay line uses look-ahead and 16 way interleaving to develop the 512 sample and hold clocks, each as little as 3.2 ns wide and 200 ps apart. Measurements of the device have demonstrated 5 GHz maximum sample rate, at least 350 MHz bandwidth, an extrapolated rms aperture uncertainty per sample of 0.7 ps, and a signal to rms noise ratio of 2000:1.
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