单层MoS2中晶界介导的门控忆阻现象
Gate-tunable Memristive Phenonmena Mediated by Grain Boundaries in Single Layer MoS2
摘要：
高速计算的持续发展取决于材料合成和器件结构的突破。通过引入忆阻器，可以显着增强逻辑和存储器的性能，忆阻器是一种两端器件，其内部电阻取决于外部偏置电压的历史。基于具有绝缘氧化物（例如TiO 2）的金属绝缘体金属（MIM）结构的现有技术忆阻器受到缺乏对细丝形成的控制和开关电压的外部控制的限制。在这里，我们报告一类忆阻器的基础上晶界（GB）在单层二硫化钼设备。具体而言，从接触出现的GB的电阻可以容易地和重复地调制，开关比高达1000和动态负微分电阻（NDR）。此外，MoS2的原子级薄性质使得能够通过场效应几何形状中的第三栅极端子来调谐设置电压，这提供了在其他已知忆阻器件中未观察到的新功能。
英文摘要：
Continued progress in high speed computing depends on breakthroughs in both materials synthesis and device architectures. The performance of logic and memory can be enhanced significantly by introducing a memristor, a two terminal device with internal resistance that depends on the history of the external bias voltage. State of the art memristors, based on metal insulator metal (MIM) structures with insulating oxides, such as TiO2, are limited by a lack of control over the filament formation and external control of the switching voltage. Here, we report a class of memristors based on grain boundaries (GBs) in single-layer MoS2 devices. Specifically, the resistance of GBs emerging from contacts can be easily and repeatedly modulated, with switching ratios up to 1000 and a dynamic negative differential resistance (NDR). Furthermore, the atomically thin nature of MoS2 enables tuning of the set voltage by a third gate terminal in a field-effect geometry, which provides new functionality that is not observed in other known memristive devices.
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