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arXiv 1306.0705physics.ins-dethep-ex
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高速VCSEL驱动器设计中的有源电感并联峰化

Active inductor shunt peaking in high-speed VCSEL driver design

Futian Liang, Datao Gong, Suen Hou, Chonghan Liu, Tiankuan Liu, Da-Shung Su, Ping-Kun Teng, Annie Xiang, Jingbo Ye, Ge Jin

摘要:

为ATLAS液氩量热计升级中的光链路设计了一个8-Gbps高速VCSEL驱动器样机,该样机采用全晶体管有源电感并联峰化结构。VCSEL驱动器是在一个商业的0.25微米蓝宝石上硅(SoS)的CMOS工艺制造的辐射容忍的目的。全晶体管有源电感并联峰化用于克服CMOS工艺的带宽限制。该峰化结构具有与无源峰化结构相同的峰化效果,但面积小,不需要线性电阻,并且可以通过外部控制来调节峰化强度来克服工艺变化。设计方案已经出炉,样机通过了初步的电性能测试和误码率测试。该驱动器实现了8-Gbps的数据速率与峰值模拟。本文介绍了一种全管有源电感并联峰化结构,并给出了仿真和测试结果。

英文摘要:

An all transistor active inductor shunt peaking structure has been used in a prototype of 8-Gbps high-speed VCSEL driver which is designed for the optical link in ATLAS liquid Argon calorimeter upgrade. The VCSEL driver is fabricated in a commercial 0.25-um Silicon-on-Sapphire (SoS) CMOS process for radiation tolerant purpose. The all transistor active inductor shunt peaking is used to overcome the bandwidth limitation from the CMOS process. The peaking structure has the same peaking effect as the passive one, but takes a small area, does not need linear resistors and can overcome the process variation by adjust the peaking strength via an external control. The design has been tapped out, and the prototype has been proofed by the preliminary electrical test results and bit error ratio test results. The driver achieves 8-Gbps data rate as simulated with the peaking. We present the all transistor active inductor shunt peaking structure, simulation and test results in this paper.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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