能量优化格子Boltzmann CFD模拟的芯片级和多节点分析
Chip-level and multi-node analysis of energy-optimized lattice-Boltzmann CFD simulations
摘要：
内存受限算法在多核处理器上表现出复杂的性能和能耗行为。我们选择英特尔Sandy Bridge集群上的晶格玻尔兹曼方法（LBM）作为原型方案，以研究单芯片性能和功耗特性是否以及如何推广到高度并行的情况。首先，我们进行分析的稀疏格LBM实现复杂的几何形状。使用单核性能模型，我们预测的芯片内饱和特性和最佳工作点的能源解决方案作为一个功能的实现细节，时钟频率，矢量化，和每个芯片的活动核心的数量。我们表明，高单核性能和正确选择每个芯片的活动核心的数量是最低的能量，以最小的性能下降的解决方案的基本优化。然后，我们外推到MPI并行级别，并量化各种优化和执行模式的节能潜力，我们发现这些指导方针更加重要，特别是当通信开销不可忽略时。在我们的设置中，与简单的方法相比，在这种情况下我们可以节省35%的能源。我们还表明，一个简单的非反射性的时钟速度减少留下了大部分的节能潜力未使用。
英文摘要：
Memory-bound algorithms show complex performance and energy consumption behavior on multicore processors. We choose the lattice-Boltzmann method (LBM) on an Intel Sandy Bridge cluster as a prototype scenario to investigate if and how single-chip performance and power characteristics can be generalized to the highly parallel case. First we perform an analysis of a sparse-lattice LBM implementation for complex geometries. Using a single-core performance model, we predict the intra-chip saturation characteristics and the optimal operating point in terms of energy to solution as a function of implementation details, clock frequency, vectorization, and number of active cores per chip. We show that high single-core performance and a correct choice of the number of active cores per chip are the essential optimizations for lowest energy to solution at minimal performance degradation. Then we extrapolate to the MPI-parallel level and quantify the energy-saving potential of various optimizations and execution modes, where we find these guidelines to be even more important, especially when communication overhead is non-negligible. In our setup we could achieve energy savings of 35% in this case, compared to a naive approach. We also demonstrate that a simple non-reflective reduction of the clock speed leaves most of the energy saving potential unused.
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