确定最大限度降低嵌入式平台能耗的解决方案
Identifying Compiler Options to Minimise Energy Consumption for Embedded Platforms
摘要：
本文提出了一种分析的能源消耗的大量的现代编译器可以执行的优化。使用GCC作为测试用例，我们评估了一组10个精心挑选的基准测试五个不同的嵌入式平台。部分因子设计用于系统地探索大的优化空间（2^82种可能的组合），同时仍然准确地确定优化和优化组合的效果。对每个平台进行硬件功耗测量，以确保捕获对能耗的所有架构影响。我们表明，部分因子设计可以找到更多的最优组合比依赖于内置的编译器设置。我们探讨了运行时间和能源消耗之间的关系，并确定它们是和不相关的情况。这项研究的进一步结论是，基准测试的结构比硬件架构对优化是否有效的影响更大，并且没有任何单一的优化对执行时间或能耗普遍有益。
英文摘要：
This paper presents an analysis of the energy consumption of an extensive number of the optimisations a modern compiler can perform. Using GCC as a test case, we evaluate a set of ten carefully selected benchmarks for five different embedded platforms. A fractional factorial design is used to systematically explore the large optimisation space (2^82 possible combinations), whilst still accurately determining the effects of optimisations and optimisation combinations. Hardware power measurements on each platform are taken to ensure all architectural effects on the energy consumption are captured. We show that fractional factorial design can find more optimal combinations than relying on built in compiler settings. We explore the relationship between run-time and energy consumption, and identify scenarios where they are and are not correlated. A further conclusion of this study is the structure of the benchmark has a larger effect than the hardware architecture on whether the optimisation will be effective, and that no single optimisation is universally beneficial for execution time or energy consumption.
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