在GSI进行的HADES和FAIR实验的TRB
The TRB for HADES and FAIR experiments at GSI
摘要：
TRB硬件模块是为HADES实验升级而开发的具有板上DAQ功能的多用途触发器和读出板。它包含一个运行Linux的单计算机芯片（Etrax）以及一个100 Mbit/s以太网接口。它最初设计为基于CERN的HPTDC芯片的128通道时间数字转换器。新版本包含一个2 Gbit/s的光链路和一个接口连接器（15 Gbit/s），以实现附加卡概念，使硬件非常灵活。此外，FPGA芯片（Xilinx，Virtex 4 LX 40）和TigerSharc DSP提供了新的计算资源，可用于运行在线分析算法。TRB被提议作为GSI-Darmstadt未来FAIR设施中计划的探测器系统PANDA和CBM的新模块的原型。
英文摘要：
The TRB hardware module is a multi-purpose Trigger and Readout Board with on-board DAQ functionality developed for the upgrade of the HADES experiment. It contains a single computer chip (Etrax) running Linux as a well as a 100 Mbit/s Ethernet interface. It has been orginally designed to work as a 128-channel Time to Digital Converter based on the HPTDC chip from CERN. The new version contains a 2 Gbit/s optical link and an interface connector (15 Gbit/s) in order to realize an add-on card concept which makes the hardware very flexible. Moreover, an FPGA chip (Xilinx, Virtex 4 LX 40) and a TigerSharc DSP provide new computing resources which can be used to run on-line analysis algorithms. The TRB is proposed as a prototype for new modules for the planned detector systems PANDA and CBM at the future FAIR facility at GSI-Darmstadt.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
