迭代应用Karatsuba方法的椭圆曲线密码硬件实现
Area Efficient Hardware Implementation of Elliptic Curve Cryptography by Iteratively Applying Karatsuba's Method
摘要：
在无线环境中尤其需要保护通信信道。但是，在软件中应用密码机制受到移动设备的计算和能量资源的限制。如果应用硬件来实现密码操作，则成本成为问题。在本文中，我们描述了一种处理所有这三点的方法。我们实现了一个硬件加速器多项式乘法在扩展伽罗瓦域（GF）应用Karatsuba的方法迭代。采用这种方法，面积消耗减少到2.1 mm^2。6.2对于Karatsuba方法的标准应用，即递归应用，为mm^2。我们的方法还将能耗降低到原始方法的60%。我们为这些成就付出的代价是执行时间的增加。在我们的实现中，多项式乘法需要3个时钟周期，而递归Karatsuba方法只需要一个时钟周期。但是考虑到面积、能量和计算速度，我们相信我们的方法的好处超过了它的缺点。
英文摘要：
Securing communication channels is especially needed in wireless environments. But applying cipher mechanisms in software is limited by the calculation and energy resources of the mobile devices. If hardware is applied to realize cryptographic operations cost becomes an issue. In this paper we describe an approach which tackles all these three points. We implemented a hardware accelerator for polynomial multiplication in extended Galois fields (GF) applying Karatsuba's method iteratively. With this approach the area consumption is reduced to 2.1 mm^2 in comparison to. 6.2 mm^2 for the standard application of Karatsuba's method i.e. for recursive application. Our approach also reduces the energy consumption to 60 per cent of the original approach. The price we have to pay for these achievement is the increased execution time. In our implementation a polynomial multiplication takes 3 clock cycles whereas the recurisve Karatsuba approach needs only one clock cycle. But considering area, energy and calculation speed we are convinced that the benefits of our approach outweigh its drawback.
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