SOC测试方法和实践
SOC Testing Methodology and Practice
摘要：
在一款商用数码相机（DSC）控制器芯片上实现了一种新型的SOC测试集成平台，解决了测试调度、测试IO减少、功能测试时序、扫描IO共享、嵌入式存储器内建自测试（BIST）等实际问题。测试结果表明，短的测试集成成本，短的测试时间，和小的面积开销可以实现。为了支持SOC测试，开发了存储器BIST编译器和SOC测试集成系统。
英文摘要：
On a commercial digital still camera (DSC) controller chip we practice a novel SOC test integration platform, solving real problems in test scheduling, test IO reduction, timing of functional test, scan IO sharing, embedded memory built-in self-test (BIST), etc. The chip has been fabricated and tested successfully by our approach. Test results justify that short test integration cost, short test time, and small area overhead can be achieved. To support SOC testing, a memory BIST compiler and an SOC testing integration system have been developed.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
