ReSCom: A Reconfigurable Spiking Neural Network Accelerator Using Stochastic Computing
ReSCom: 一种使用随机计算的可重构脉冲神经网络加速器
Ali Alipour Fereidani, Mohammad Rasoul Roshanshah, Saeed Safari
AI总结 提出ReSCom,一种基于随机计算的可重构SNN加速器,通过随机算术降低硬件复杂度,支持IF、LIF和突触神经元模型,在MNIST上达到92.80%准确率,每图仅耗0.05mJ能量。
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脉冲神经网络(SNN)因其事件驱动计算和生物启发动力学,为节能推理提供了有吸引力的框架。然而,SNN的高效硬件实现仍然具有挑战性,因为神经元计算会带来显著的功耗和面积成本,并且当精度管理不当时,不受控制的近似算术会破坏循环状态更新的稳定性。为了解决这些挑战,本文提出了ReSCom,一种可重构的SNN加速器,它利用随机计算来降低硬件复杂度,同时保持稳定的推理。所提出的架构在神经元动力学中的乘法运算采用随机算术,同时保留精确的定点加法/减法运算。这种随机策略能够在精度、延迟和能耗之间实现运行时权衡。统一的可重构神经元设计在单个硬件框架内支持整合-放电(IF)、泄漏整合-放电(LIF)和突触神经元模型。在Xilinx Artix-7 FPGA上对MNIST推理的实验结果表明,ReSCom在100 MHz下实现了92.80%的分类准确率,每幅图像仅消耗0.05 mJ的操作能量,优于近期最先进实现的能效。此外,管理随机比特流长度允许对精度-延迟-能耗权衡进行显式、动态控制,以满足目标应用约束。
Spiking Neural Networks (SNNs) provide an attractive framework for energy-efficient inference due to their event-driven computation and biologically inspired dynamics. However, efficient hardware realization of SNNs remains challenging because neuronal computations incur significant power and area costs, and uncontrolled approximate arithmetic can destabilize recurrent state updates when precision is not properly managed. To address these challenges, this paper presents ReSCom, a reconfigurable SNN accelerator that leverages stochastic computing to reduce hardware complexity while maintaining stable inference. The proposed architecture employs stochastic arithmetic for multiplication operations in neuron dynamics, while preserving exact fixed-point addition/subtraction operations. This stochastic strategy enables runtime trade-offs between accuracy, latency, and energy consumption. A unified reconfigurable neuron design supports Integrate-and-Fire (IF), Leaky Integrate-and-Fire (LIF), and Synaptic neuron models within a single hardware framework. Experimental results for MNIST inference on a Xilinx Artix-7 FPGA show that ReSCom achieves $92.80\%$ classification accuracy while consuming just $0.05~\mathrm{mJ}$ of operational energy per image at $100~\mathrm{MHz}$, outperforming the energy efficiency of recent state-of-the-art implementations. Furthermore, managing the stochastic bit-stream length allows explicit, dynamic control over accuracy-latency-energy trade-offs to meet target application constraints.